FEATURES
DESCRIPTION
D Precision Fault Threshold D Programmable Average Power Limiting D Programmable Linear Current Control D Programmable Overcurrent Limit D Programmable Fault Time D Fault Output Indicator D Shutdown Control D Undervoltage Lockout D 8-Pin SOIC APPLICATIONS
D –48-V Distributed Power Systems D Central Office Switching D Wireless Base Stations SIMPLIFIED APPLICATION DIAGRAM R1 3 RVDD Power Limiting RPL 8 DC/DC Converter or Load In the event of a constant fault, the internal timer limits the on-time from less than 0.1% to a maximum of 3%. The duty cycle modulates depending on the current into the PL pin, which is a function of the voltage across the FET, and limits average power dissipation in the FET. The fault level is fixed at 50 mV across the current-sense resistor to minimize total dropout. The fault current level is set with an external current sense resistor. The maximum allowable sourcing current is programmed with a voltage divider from VDD to generate a fixed voltage on the IMAX pin.
Texas Instruments
