AN2140 Datasheet | Freescale Semiconductor

Key Features

• All rights reserved. © Motorola, Inc., 2003 For More Information On This Product, Go to: www.freescale.com Freescale Semiconductor, Inc. AN2140/D ISR acknowledges the error and does a real-time interrupt (RTI). If the loss of lock was due to noise, the monitor would resume normal operation. If there was a more serious problem such as a broken FLL, the monitor would stop working. Normally, interrupts are blocked while the monitor has control so this ISR is really just included for the case where a user clears I in their code and then the ICG experiences a loss of lock. (This reduces the risk that an ICG failure would lock up the user’s application.) Block Protection Freescale Semiconductor, Inc... In order to prevent accidental changes to the monitor program itself, the 1 Kbyte block of FLASH memory where it resides ($FC00-$FFFF), is block protected. The only way to change the contents of this protected block, is to use a BDM-based development tool (a BDM pod) to disable the block protection and then bulk erase the FLASH memory (or at least the last two 512-byte pages). In the lowest-cost applications where the monitor is used with an SCI serial interface to the RS-232 serial port on a personal computer, there is no way to accidentally erase or modify the monitor software. Not even errors in a user program can cause changes to the monitor because the block protect can only be disengaged through a BDM command with a BDM-based debug pod. Baud Rate Detection The MC9S08GB60 version of this monitor assumes a 32.768-kHz crystal. It programs the FLL to produce a bus frequency of 18.874368 MHz and accommodates RS-232 serial communications through SCI1 at 115.2 kbaud. The monitor does not attempt to allow debugging of a user program that uses a different crystal frequency or sets up the FLL differently. For such systems, you should purchase a BDM pod which allows more sophisticated debugging. Other variations of the monitor will use the internal oscillator on some HCS08 derivatives and/or other combinations of crystals and FLL settings. However, they will all send a break and wait for a carriage return before sending the first prompt sequence. In a later section of this application note, the parameters and control register settings that are related to the oscillator, FLL, and other frequency-sensitive features of the monitor will be discussed in greater detail. During initialization after any cold reset, a long break is transmitted before other SCI communications. This break is about 30 bit-times to ensure that a Windows-based PC can recognize this as a break. In order to establish communications with the monitor, the host must send a carriage return ($0D) at the correct baud rate. If the monitor detects some other character, it implies 2 Serial Monitor for MC9S08GB/GT For More Information On This Product, Go to: www.freescale.com Freescale Semiconductor, Inc.