Nexperia 74ABT74
The 74ABT74 is a dual positive edge triggered D-type flip-flop with individual data (D), clock (CP), set (SD) and reset (RD) inputs, and complementary Q and Q outputs. This device is fully specified for partial power down applications using IOFF. The IOFF circuitry disables the output, preventing the potentially damaging backflow current through the device when it is powered down.| Part No. | 74ABT74 |
|---|---|
| Datasheet | 74ABT74 Download |
| Manufacturer |  Nexperia |
| Description | Dual D-type flip-flop |
| Buy | Stock & Price |
FEATURES AND BENEFITS
● Supply voltage range from 4.5 V to 5.5 V● BiCMOS high speed and output drive
● Direct interface with TTL levels
● Power-up 3-state
● IOFF circuitry provides partial Power-down mode operation
● Latch-up protection exceeds 500 mA per JESD78B class II level A
● ESD protection:
● HBM JESD22-A114F exceeds 2000 V
● MM JESD22-A115-A exceeds 200 V
● Specified from -40 °C to +85 °C 3. Ordering information Table 1. Ordering information Type number Package Temperature range Name 74ABT74D -40 °C to +85 °C SO14 74ABT74PW -40 °C to +85 °C TSSOP14
DESCRIPTION
plastic small outline package; 14 leads; body width 3.9 mm plastic thin shrink small outline package; 14 leads; body width 4.4 mm Version SOT108-1 SOT402-1 Nexperia 4. Functional diagram 4 10 1SD 2SD SD 2 12 1D 2D D 1Q 5 Q 2Q 9 3 11 1CP 2CP CP FF 1Q 6 Q RD 2Q 8 1RD 2RD 1 13 mna418 Fig. 1. Logic symbol nSD 74ABT74 Dual D-type flip-flop with set and reset; positive edge-trigger 4 S 5 3 C1 2 1D 6 1 R 10 S 9 11 C1 12 1D 8 13 R mna419 Fig.
