Part 74AHC373
Description Octal D-type transparant latch
Manufacturer Nexperia
Size 227.45 KB
Nexperia
74AHC373

Overview

The 74AHC373 is a high-speed Si-gate CMOS device and is pin compatible with Low-power Schottky TTL (LSTTL). It is specified in compliance with JEDEC standard No. 7-A.

  • Balanced propagation delays
  • All inputs have a Schmitt-trigger action
  • Common 3-state output enable input
  • Inputs accepts voltages higher than VCC
  • Functionally identical to the 74AHC573; 74AHCT573
  • Input levels at CMOS input level
  • ESD protection:
  • HBM EIA/JESD22-A114E exceeds 2000 V
  • MM EIA/JESD22-A115-A exceeds 200 V
  • CDM EIA/JESD22-C101C exceeds 1000 V