Datasheet Summary
Octal D-type transparant latch; 3-state
Rev. 4
- 5 March 2019
Product data sheet
1. General description
The 74AHC373 is a high-speed Si-gate CMOS device and is pin patible with Low-power Schottky TTL (LSTTL). It is specified in pliance with JEDEC standard No. 7-A.
The 74AHC373 consists of eight D-type transparent latches featuring separate D-type inputs for each latch and 3-state true outputs for bus oriented applications. A latch enable input (LE) and an output enable input (OE) are mon to all latches.
When pin LE is HIGH, data at the Dn inputs enters the latches. In this condition the latches are transparent, i.e. a latch output will change state each time its...
