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74AHCT02-Q100 Datasheet Quad 2-input Nor Gate

Manufacturer: Nexperia

Overview: 74AHC02-Q100; 74AHCT02-Q100 Quad 2-input NOR gate Rev. 2 — 11 May 2020 Product data sheet 1.

This datasheet includes multiple variants, all published together in a single manufacturer document.

General Description

The 74AHC02-Q100;

74AHCT02-Q100 is a high-speed Si-gate CMOS device and is pin compatible with Low-power Schottky TTL (LSTTL).

It is specified in compliance with JEDEC standard No.

Key Features

  • Automotive product qualification in accordance with AEC-Q100 (Grade 1).
  • Specified from -40 °C to +85 °C and from -40 °C to +125 °C.
  • Balanced propagation delays.
  • All inputs have a Schmitt-trigger action.
  • Inputs accept voltages higher than VCC.
  • Input levels:.
  • For 74AHC02-Q100: CMOS level.
  • For 74AHCT02-Q100: TTL level.
  • ESD protection:.
  • MIL-STD-883, method 3015 exceeds 2000 V.
  • HBM JESD22-A114F exceeds.

More Datasheets from Nexperia

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74AHCT00-Q100 Quad 2-input NAND gate
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74AHCT02-Q100 Distributor