74AHCT164-Q100 Datasheet PDF - nexperia 8-bit serial-in/parallel-out shift register Specs

74AHCT164-Q100 - 8-bit serial-in/parallel-out shift register

This page provides the datasheet information for the 74AHCT164-Q100, a member of the 74AHC164-Q100 8-bit serial-in/parallel-out shift register family.

Datasheet Summary

Description

The 74AHC164-Q100; 74AHCT164-Q100 is an 8-bit serial-in/parallel-out shift register.

Features

two serial data inputs (DSA and DSB), eight parallel data outputs (Q0 to Q7). Data is entered serially through DSA or DSB and either input can be used as an active HIGH enable for data entry through the other input. Data is shifted on the LOW-to-HIGH transitions of the clock (CP) input. A LOW on the master reset input (MR) clears the register and forces all outputs LOW, independently of other inputs. Inputs are overvoltage tolerant. This feature allows the use of these devices as translators in.

Datasheet Details

Part number	74AHCT164-Q100
Manufacturer	nexperia
File Size	261.53 KB
Description	8-bit serial-in/parallel-out shift register
Datasheet	74AHCT164-Q100 Datasheet
Additional preview pages of the 74AHCT164-Q100 datasheet.

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Full PDF Text Transcription

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74AHC164-Q100; 74AHCT164-Q100 8-bit serial-in/parallel-out shift register Rev. 2 — 11 June 2020 Product data sheet 1. General description The 74AHC164-Q100; 74AHCT164-Q100 is an 8-bit serial-in/parallel-out shift register. The device features two serial data inputs (DSA and DSB), eight parallel data outputs (Q0 to Q7). Data is entered serially through DSA or DSB and either input can be used as an active HIGH enable for data entry through the other input. Data is shifted on the LOW-to-HIGH transitions of the clock (CP) input. A LOW on the master reset input (MR) clears the register and forces all outputs LOW, independently of other inputs. Inputs are overvoltage tolerant. This feature allows the use of these devices as translators in mixed voltage environments.

Published: Jul 26, 2019 |