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74AHCT30-Q100 - 8-input NAND gate

This page provides the datasheet information for the 74AHCT30-Q100, a member of the 74AHC30-Q100 8-input NAND gate family.

Description

The 74AHC30-Q100; 74AHCT30-Q100 is a high-speed Si-gate CMOS device and is pin compatible with Low-power Schottky TTL (LSTTL).

It is specified in compliance with JEDEC standard No.

7-A.

Features

  • Automotive product qualification in accordance with AEC-Q100 (Grade 1).
  • Specified from -40 °C to +85 °C and from -40 °C to +125 °C.
  • Balanced propagation delays.
  • All inputs have Schmitt-trigger actions.
  • Inputs accept voltages higher than VCC.
  • Input levels:.
  • For 74AHC30-Q100: CMOS level.
  • For 74AHCT30-Q100: TTL level.
  • ESD protection:.
  • MIL-STD-883, method 3015 exceeds 2000 V.
  • HBM JESD22-A114F exceeds.

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Datasheet Details

Part number 74AHCT30-Q100
Manufacturer nexperia
File Size 230.40 KB
Description 8-input NAND gate
Datasheet download datasheet 74AHCT30-Q100 Datasheet
Additional preview pages of the 74AHCT30-Q100 datasheet.

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Full PDF Text Transcription

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74AHC30-Q100; 74AHCT30-Q100 8-input NAND gate Rev. 2 — 6 May 2020 Product data sheet 1. General description The 74AHC30-Q100; 74AHCT30-Q100 is a high-speed Si-gate CMOS device and is pin compatible with Low-power Schottky TTL (LSTTL). It is specified in compliance with JEDEC standard No. 7-A. The 74AHC30-Q100; 74AHCT30-Q100 provides an 8-input NAND function. This product has been qualified to the Automotive Electronics Council (AEC) standard Q100 (Grade 1) and is suitable for use in automotive applications. 2.
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