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74AHCT30-Q100

Manufacturer: Nexperia

74AHCT30-Q100 datasheet by Nexperia.

This datasheet includes multiple variants, all published together in a single manufacturer document.

74AHCT30-Q100 datasheet preview

74AHCT30-Q100 Datasheet Details

Part number 74AHCT30-Q100
Datasheet 74AHCT30-Q100 74AHC30-Q100 Datasheet (PDF)
File Size 230.40 KB
Manufacturer Nexperia
Description 8-input NAND gate
74AHCT30-Q100 page 2 74AHCT30-Q100 page 3

74AHCT30-Q100 Overview

74AHCT30-Q100 is a high-speed Si-gate CMOS device and is pin patible with Low-power Schottky TTL (LSTTL). It is specified in pliance with JEDEC standard No. 74AHCT30-Q100 provides an 8-input NAND function.

74AHCT30-Q100 Key Features

  • Automotive product qualification in accordance with AEC-Q100 (Grade 1)
  • Specified from -40 °C to +85 °C and from -40 °C to +125 °C
  • Balanced propagation delays
  • All inputs have Schmitt-trigger actions
  • Inputs accept voltages higher than VCC
  • Input levels
  • For 74AHC30-Q100: CMOS level
  • For 74AHCT30-Q100: TTL level
  • ESD protection
  • MIL-STD-883, method 3015 exceeds 2000 V

74AHCT30-Q100 Applications

  • Automotive product qualification in accordance with AEC-Q100 (Grade 1)
  • Specified from -40 °C to +85 °C and from -40 °C to +125 °C
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74AHCT30-Q100 Distributor

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