74AHCT541-Q100 Datasheet | Nexperia

description The 74AHC541-Q100; 74AHCT541-Q100 is a high-speed Si-gate CMOS device. The 74AHC541-Q100; 74AHCT541-Q100 are octal non-inverting buffer/line drivers with 3-state bus patible outputs. The output enable inputs OE0 and OE1, control the 3-state outputs. A HIGH on OEn causes the outputs to assume a high-impedance OFF-state. This product has been qualified to the Automotive Electronics Council (AEC) standard Q100 (Grade 1) and is suitable for use in automotive applications. 2. Features and benefits - Automotive product qualification in accordance with AEC-Q100 (Grade 1) - Specified from -40 °C to +85 °C and from -40 °C to +125 °C - Balanced propagation delays - All inputs have a Schmitt-trigger action - Inputs accept voltages higher than VCC - For 74AHC541-Q100 only: operates with CMOS input levels - For 74AHCT541-Q100 only: operates with TTL input levels - ESD protection: - MIL-STD-883, method 3015 exceeds 2000 V - HBM JESD22-A114F exceeds 2000 V - MM JESD22-A115-A exceeds 200 V (C = 200 p F, R = 0 Ω) - Multiple package options - DHVQFN package with Side-Wettable Flanks enabling Automatic Optical Inspection (AOI) of solder joints 3. Ordering information Table 1. Ordering information Type number Package Temperature range Name 74AHC541D-Q100 -40 °C to +125 °C SO20 74AHCT541D-Q100 74AHC541PW-Q100 -40 °C to +125 °C TSSOP20 74AHCT541PW-Q100 74AHC541BQ-Q100 -40 °C to +125 °C DHVQFN20 74AHCT541BQ-Q100 Description plastic small outline package; 20 leads; body width 7.5 mm plastic thin shrink small outline package; 20 leads; body width 4.4 mm plastic dual in-line patible thermal enhanced very thin quad flat package; no leads; 20 terminals; body 2.5 × 4.5 × 0.85 mm Version SOT163-1 SOT360-1 SOT764-1 Nexperia 4. Functional diagram 2 A0 3 A1 A2 4 A3 5 6 A4 Y0 18 Y1 17 Y2 16 Y3 15 Y4...