74ALVCH162244 Overview
The 74ALVCH162244 has active bus hold circuitry which is provided to hold unused or floating data inputs at a valid logic level. This feature eliminates the need for external pull-up or pull-down resistors. 2
74ALVCH162244 Key Features
- Wide supply voltage range from 1.2 V to 3.6 V
- CMOS low power consumption
- MultiByte flow-through standard pin-out architecture
- Low inductance multiple VCC and GND pins for minimum noise and ground bounce
- Direct interface with TTL levels (2.7 V to 3.6 V)
- Bus hold on all data inputs
- Integrated 30 Ω termination resistor
- plies with JEDEC standards
- JESD8-5 (2.3 V to 2.7 V)
- JESD8B/JESD36 (2.7 V to 3.6 V)
