Datasheet4U Logo Datasheet4U.com

74AUP1G0832 - Low-power 3-input AND-OR gate

Description

The 74AUP1G0832 is a single 3-input AND-OR gate.

Schmitt-trigger action at all inputs makes the circuit tolerant of slower input rise and fall times.

This device ensures very low static and dynamic power consumption across the entire VCC range from 0.8 V to 3.6 V.

Features

  • Wide supply voltage range from 0.8 V to 3.6 V.
  • CMOS low power dissipation.
  • High noise immunity.
  • Overvoltage tolerant inputs to 3.6 V.
  • Low noise overshoot and undershoot < 10 % of VCC.
  • IOFF circuitry provides partial Power-down mode operation.
  • Latch-up performance exceeds 100 mA per JESD 78 Class II Level B.
  • Low static power consumption; ICC = 0.9 μA (maximum).
  • Complies with JEDEC standards:.
  • JESD8-12 (0.8.

📥 Download Datasheet

Datasheet preview – 74AUP1G0832

Datasheet Details

Part number 74AUP1G0832
Manufacturer nexperia
File Size 254.83 KB
Description Low-power 3-input AND-OR gate
Datasheet download datasheet 74AUP1G0832 Datasheet
Additional preview pages of the 74AUP1G0832 datasheet.

📁 Similar Datasheet

  • 74AUP1G0832 - Low Power 3-Input AND-OR Gate (NXP)
  • 74AUP1G08 - Low-power 2-input AND gate (NXP Semiconductors)
  • 74AUP1G08 - SINGLE 2 INPUT POSITIVE AND GATE (Diodes)
  • 74AUP1G00 - Low-power 2-input NAND gate (NXP Semiconductors)
  • 74AUP1G00 - SINGLE 2 INPUT POSITIVE NAND GATE (Diodes)
  • 74AUP1G02 - Low-power 2-input NOR gate (NXP)
  • 74AUP1G02 - SINGLE 2 INPUT POSITIVE NOR GATE (Diodes)
  • 74AUP1G04 - Low-power inverter (NXP Semiconductors)
  • 74AUP1G04 - Low power single inverter gate (STMicroelectronics)
  • 74AUP1G04 - SINGLE INVERTER GATE (Diodes)
Other Datasheets by nexperia

Full PDF Text Transcription

Click to expand full text
74AUP1G0832 Low-power 3-input AND-OR gate Rev. 6 — 14 January 2022 Product data sheet 1. General description The 74AUP1G0832 is a single 3-input AND-OR gate. Schmitt-trigger action at all inputs makes the circuit tolerant of slower input rise and fall times. This device ensures very low static and dynamic power consumption across the entire VCC range from 0.8 V to 3.6 V. This device is fully specified for partial power down applications using IOFF. The IOFF circuitry disables the output, preventing the potentially damaging backflow current through the device when it is powered down. 2. Features and benefits • Wide supply voltage range from 0.8 V to 3.6 V • CMOS low power dissipation • High noise immunity • Overvoltage tolerant inputs to 3.
Published: |