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74AUP1G11 - Low-power 3-input AND gate

General Description

The 74AUP1G11 is a single 3-input AND gate.

Schmitt-trigger action at all inputs makes the circuit tolerant of slower input rise and fall times.

This device ensures very low static and dynamic power consumption across the entire VCC range from 0.8 V to 3.6 V.

Key Features

  • Wide supply voltage range from 0.8 V to 3.6 V.
  • Low static power consumption; ICC = 0.9 μA (maximum).
  • High noise immunity.
  • Latch-up performance exceeds 100 mA per JESD 78 Class II Level B.
  • Overvoltage tolerant inputs to 3.6 V.
  • Low noise overshoot and undershoot < 10 % of VCC.
  • IOFF circuitry provides partial Power-down mode operation.
  • Complies with JEDEC standards:.
  • JESD8-12 (0.8 V to 1.3 V).
  • JESD8-11 (0.9 V.

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Datasheet Details

Part number 74AUP1G11
Manufacturer Nexperia
File Size 250.78 KB
Description Low-power 3-input AND gate
Datasheet download datasheet 74AUP1G11 Datasheet

Full PDF Text Transcription (Reference)

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74AUP1G11 Low-power 3-input AND gate Rev. 6 — 19 May 2021 Product data sheet 1. General description The 74AUP1G11 is a single 3-input AND gate. Schmitt-trigger action at all inputs makes the circuit tolerant of slower input rise and fall times. This device ensures very low static and dynamic power consumption across the entire VCC range from 0.8 V to 3.6 V. This device is fully specified for partial power down applications using IOFF. The IOFF circuitry disables the output, preventing the potentially damaging backflow current through the device when it is powered down. 2. Features and benefits • Wide supply voltage range from 0.8 V to 3.6 V • Low static power consumption; ICC = 0.