Datasheet4U Logo Datasheet4U.com

74AUP1T58 - Low-power configurable gate

General Description

The 74AUP1T58 is a configurable multiple function gate with level translating, Schmitt-trigger inputs.

The device can be configured as any of the following logic functions AND, OR, NAND, NOR, XOR, inverter and buffer; using the 3-bit input.

All inputs can be connected directly to VCC or GND.

Key Features

  • Wide supply voltage range from 2.3 V to 3.6 V.
  • High noise immunity.
  • Low static power consumption; ICC = 1.5 μA (maximum).
  • Latch-up performance exceeds 100 mA per JESD 78 Class II Level B.
  • Overvoltage tolerant inputs to 3.6 V.
  • Low noise overshoot and undershoot < 10 % of VCC.
  • IOFF circuitry provides partial power-down mode operation.
  • ESD protection:.
  • HBM JESD22-A114F Class 3A exceeds 5000 V.
  • MM JESD22-A115-.

📥 Download Datasheet

Datasheet Details

Part number 74AUP1T58
Manufacturer Nexperia
File Size 262.72 KB
Description Low-power configurable gate
Datasheet download datasheet 74AUP1T58 Datasheet

Full PDF Text Transcription (Reference)

The following content is an automatically extracted verbatim text from the original manufacturer datasheet and is provided for reference purposes only.

View original datasheet text
74AUP1T58 Low-power configurable gate with voltage-level translator Rev. 7 — 26 January 2022 Product data sheet 1. General description The 74AUP1T58 is a configurable multiple function gate with level translating, Schmitt-trigger inputs. The device can be configured as any of the following logic functions AND, OR, NAND, NOR, XOR, inverter and buffer; using the 3-bit input. All inputs can be connected directly to VCC or GND. Low threshold Schmitt trigger inputs allow these devices to be driven by 1.8 V logic levels in 3.3 V applications. This device ensures very low static and dynamic power consumption across the entire VCC range from 2.3 V to 3.6 V. This device is fully specified for partial power down applications using IOFF.