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74AUP2G32 - Low-power dual 2-input OR gate

Product Overview

nexperia

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74AUP2G32 Low-power dual 2-input OR gate by nexperia - Datasheet Preview — Datasheet preview – 74AUP2G32

Datasheet Details

Part number	74AUP2G32
Manufacturer	nexperia
File Size	298.17 KB
Description	Low-power dual 2-input OR gate
Datasheet	74AUP2G32 Datasheet
Additional preview pages of the 74AUP2G32 datasheet.

Product details

Description

The 74AUP2G32 is a dual 2-input OR gate.

Schmitt-trigger action at all inputs makes the circuit tolerant of slower input rise and fall times.

This device ensures very low static and dynamic power consumption across the entire VCC range from 0.8 V to 3.6 V.

Features

Wide supply voltage range from 0.8 V to 3.6 V.
CMOS low power dissipation.
High noise immunity.
Low static power consumption; ICC = 0.9 μA (maximum).
Latch-up performance exceeds 100 mA per JESD 78 Class II Level B.
Overvoltage tolerant inputs to 3.6 V.
Low noise overshoot and undershoot < 10 % of VCC.
IOFF circuitry provides partial Power-down mode operation.
Complies with JEDEC standards:.
JESD8-12 (0.8.

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Published: Jul 23, 2019 |