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74AUP2G79 Datasheet

Manufacturer: Nexperia
74AUP2G79 datasheet preview

Datasheet Details

Part number 74AUP2G79
Datasheet 74AUP2G79-nexperia.pdf
File Size 274.28 KB
Manufacturer Nexperia
Description Low-power dual D-type flip-flop
74AUP2G79 page 2 74AUP2G79 page 3

74AUP2G79 Overview

The 74AUP2G79 provides the dual positive-edge triggered D-type flip-flop. Information on the data input (nD) is transferred to the nQ output on the LOW-to-HIGH transition of the clock pulse (nCP). The nD input must be stable one set-up time prior to the LOW-to-HIGH clock transition for predictable operation.

74AUP2G79 Key Features

  • Wide supply voltage range from 0.8 V to 3.6 V
  • High noise immunity
  • plies with JEDEC standards
  • JESD8-12 (0.8 V to 1.3 V)
  • JESD8-11 (0.9 V to 1.65 V)
  • JESD8-7 (1.2 V to 1.95 V)
  • JESD8-5 (1.8 V to 2.7 V)
  • JESD8-B (2.7 V to 3.6 V)
  • ESD protection
  • HBM JESD22-A114F Class 3A exceeds 5000 V

74AUP2G79 Applications

  • Wide supply voltage range from 0.8 V to 3.6 V

74AUP2G79 from other manufacturers

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Brand Logo Part Number Description Other Manufacturers
NXP Semiconductors Logo 74AUP2G79 Low-power dual D-type flip-flop NXP Semiconductors
Nexperia logo - Manufacturer

More Datasheets from Nexperia

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Part Number Description
74AUP2G79-Q100 Low-power dual D-type flip-flop
74AUP2G00 Low-power dual 2-input NAND gate
74AUP2G00-Q100 Low-power dual 2-input NAND gate
74AUP2G02 Low-power dual 2-input NOR gate
74AUP2G04 Low-power dual inverter
74AUP2G04-Q100 Low-power dual inverter
74AUP2G06 Low-power dual inverter
74AUP2G0604 Low-power inverting buffer
74AUP2G07 Low-power dual buffer
74AUP2G08 Low-power dual 2-input AND gate

74AUP2G79 Distributor

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