Description
The 74HC4020; 74HCT4020 is a 14-stage binary ripple counter with a clock input (CP), an overriding asynchronous master reset input (MR) and 12 buffered parallel outputs (Q0, and Q3 to Q13).
The counter advances on the HIGH-to-LOW transition of CP.
Features
- Wide supply voltage range from 2.0 V to 6.0 V.
- CMOS low power dissipation.
- High noise immunity.
- Latch-up performance exceeds 100 mA per JESD 78 Class II Level B.
- Complies with JEDEC standards:.
- JESD8C (2.7 V to 3.6 V).
- JESD7A (2.0 V to 6.0 V).
- Input levels:.
- For 74HC4020: CMOS level.
- For 74HCT4020: TTL level.
- ESD protection:.
- HBM JESD22-A114F exceeds 2000 V.
- MM JESD22-A115-A exce.