Description
The 74HC75 is a quad bistable transparent latch with complementary outputs.
Two latches are simultaneously controlled by one of two active HIGH enable inputs (LE12 and LE34).
When LEnn is HIGH, the data enters the latches and appears at the nQ outputs.
Features
- Wide supply voltage range from 2.0 V to 6.0 V.
- CMOS low power dissipation.
- High noise immunity.
- Latch-up performance exceeds 100 mA per JESD 78 Class II Level B.
- Complies with JEDEC standards:.
- JESD8C (2.7 V to 3.6 V).
- JESD7A (2.0 V to 6.0 V).
- Complementary Q and Q outputs.
- VCC and GND on the center pins.
- CMOS input levels.
- ESD protection:.
- HBM: ANSI/ESDA/JEDEC JS-001 class 2 exceeds 2000.
74HC75D Datasheet
