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74HCT112 Datasheet

Manufacturer: Nexperia

This datasheet includes multiple variants, all published together in a single manufacturer document.

74HCT112 datasheet preview

Datasheet Details

Part number 74HCT112
Datasheet 74HCT112 74HC112 Datasheet (PDF)
File Size 262.50 KB
Manufacturer Nexperia
Description Dual JK flip-flop
74HCT112 page 2 74HCT112 page 3

74HCT112 Overview

74HCT112 is a dual negative-edge triggered JK flip-flop.

74HCT112 Key Features

  • Input levels
  • For 74HC112: CMOS level
  • For 74HCT112: TTL level
  • Asynchronous set and reset
  • Specified in pliance with JEDEC standard no. 7A
  • ESD protection
  • HBM JESD22-A114F exceeds 2000 V
  • MM JESD22-A115-A exceeds 200 V
  • Specified from -40 °C to +85 °C and from -40 °C to +125 °C
  • 40 °C to +125 °C

74HCT112 from other manufacturers

See all manufacturers

Brand Logo Part Number Description Other Manufacturers
Philips Logo 74HCT112 Dual JK flip-flop Philips
Nexperia logo - Manufacturer

More Datasheets from Nexperia

See all Nexperia datasheets

Part Number Description
74HCT112D Dual JK flip-flop
74HCT11 Triple 3-input AND gate
74HCT11-Q100 Triple 3-input AND gate
74HCT11D Triple 3-input AND gate
74HCT11DB Triple 3-input AND gate
74HCT11PW Triple 3-input AND gate
74HCT10 Triple 3-input NAND gate
74HCT10-Q100 Triple 3-input NAND gate
74HCT107 Dual JK flip-flop
74HCT107-Q100 Dual JK flip-flop

74HCT112 Distributor

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