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74HCT132 - Quad 2-input NAND Schmitt trigger

This page provides the datasheet information for the 74HCT132, a member of the 74HC132 Quad 2-input NAND Schmitt trigger family.

Datasheet Summary

Description

The 74HC132; 74HCT132 is a quad 2-input NAND gate with Schmitt-trigger inputs.

Inputs include clamp diodes.

This enables the use of current limiting resistors to interface inputs to voltages in excess of VCC.

Features

  • Wide supply voltage range from 2.0 to 6.0 V.
  • CMOS low power dissipation.
  • High noise immunity.
  • Unlimited input rise and fall times.
  • Latch-up performance exceeds 100 mA per JESD 78 Class II Level B.
  • Complies with JEDEC standards:.
  • JESD8C (2.7 V to 3.6 V).
  • JESD7A (2.0 V to 6.0 V).
  • ESD protection:.
  • HBM JESD22-A114F exceeds 2000 V.
  • MM JESD22-A115-A exceeds 200 V.
  • Multiple package options.

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Datasheet preview – 74HCT132

Datasheet Details

Part number 74HCT132
Manufacturer nexperia
File Size 264.89 KB
Description Quad 2-input NAND Schmitt trigger
Datasheet download datasheet 74HCT132 Datasheet
Additional preview pages of the 74HCT132 datasheet.

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Full PDF Text Transcription

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74HC132; 74HCT132 Quad 2-input NAND Schmitt trigger Rev. 7 — 13 August 2021 Product data sheet 1. General description The 74HC132; 74HCT132 is a quad 2-input NAND gate with Schmitt-trigger inputs. Inputs include clamp diodes. This enables the use of current limiting resistors to interface inputs to voltages in excess of VCC. Schmitt trigger inputs transform slowly changing input signals into sharply defined jitter-free output signals. 2. Features and benefits • Wide supply voltage range from 2.0 to 6.0 V • CMOS low power dissipation • High noise immunity • Unlimited input rise and fall times • Latch-up performance exceeds 100 mA per JESD 78 Class II Level B • Complies with JEDEC standards: • JESD8C (2.7 V to 3.6 V) • JESD7A (2.0 V to 6.
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