Datasheet4U Logo Datasheet4U.com

74HCT238-Q100 - 3-to-8 line decoder/demultiplexer

Download the 74HCT238-Q100 datasheet PDF. This datasheet also covers the 74HC238-Q100 variant, as both devices belong to the same 3-to-8 line decoder/demultiplexer family and are provided as variant models within a single manufacturer datasheet.

General Description

The 74HC238-Q100; 74HCT238-Q100 decodes three binary weighted address inputs (A0, A1 and A2) to eight mutually exclusive outputs (Y0 to Y7).

Key Features

  • Automotive product qualification in accordance with AEC-Q100 (Grade 1).
  • Specified from -40 °C to +85 °C and from -40 °C to +125 °C.
  • Demultiplexing capability.
  • Multiple input enable for easy expansion.
  • Ideal for memory chip select decoding.
  • Active HIGH mutually exclusive outputs.
  • Multiple package options.
  • Complies with JEDEC standard no. 7A.
  • Input levels:.
  • For 74HC238: CMOS level.
  • For 74HCT238: TTL.

📥 Download Datasheet

Note: The manufacturer provides a single datasheet file (74HC238-Q100-nexperia.pdf) that lists specifications for multiple related part numbers.

📁 Similar Datasheet

Part Number Description Manufacturer
74HCT238 3-to-8 line decoder/demultiplexer Philips
74HCT237 3-to-8 line decoder/demultiplexer Philips
74HCT237 High-Speed CMOS Logic 3 to 8-Line Decoder/Demultiplexer Texas Instruments
74HCT20 Dual 4-input NAND gate Philips
74HCT21 Dual 4-input AND gate Philips

Other Datasheets by Nexperia

Part Number Description
74HCT238 3-to-8 line decoder/demultiplexer
74HCT238D 3-to-8 line decoder/demultiplexer
74HCT20 Dual 4-input NAND gate
74HCT20-Q100 Dual 4-input NAND gate
74HCT20D Dual 4-input NAND gate

Full PDF Text Transcription (Reference)

The following content is an automatically extracted verbatim text from the original manufacturer datasheet and is provided for reference purposes only.

View original datasheet text
74HC238-Q100; 74HCT238-Q100 3-to-8 line decoder/demultiplexer Rev. 3 — 3 April 2020 Product data sheet 1. General description The 74HC238-Q100; 74HCT238-Q100 decodes three binary weighted address inputs (A0, A1 and A2) to eight mutually exclusive outputs (Y0 to Y7). The device features three enable inputs (E1 and E2 and E3). Every output will be LOW unless E1 and E2 are LOW and E3 is HIGH. This multiple enable function allows easy parallel expansion to a 1-of-32 (5 to 32 lines) decoder with just four '238 ICs and one inverter. The '238 can be used as an eight output demultiplexer by using one of the active LOW enable inputs as the data input and the remaining enable inputs as strobes. Inputs include clamp diodes.