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74HCT2G34 - Dual buffer gate

This page provides the datasheet information for the 74HCT2G34, a member of the 74HC2G34 Dual buffer gate family.

Datasheet Summary

Description

The 74HC2G34; 74HCT2G34 is a dual buffer.

Inputs include clamp diodes.

This enables the use of current limiting resistors to interface inputs to voltages in excess of VCC.

Features

  • Wide supply voltage range from 2.0 V to 6.0 V.
  • High noise immunity.
  • CMOS low power dissipation.
  • Balanced propagation delays.
  • Unlimited input rise and fall times.
  • Input levels:.
  • For 74HC2G34: CMOS level.
  • For 74HCT2G34: TTL level.
  • Latch-up performance exceeds 100 mA per JESD 78 Class II Level B.
  • Complies with JEDEC standards.
  • JESD8C (2.7 V to 3.6 V).
  • JESD7A (2.0 V to 6.0 V).
  • ESD pr.

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Datasheet preview – 74HCT2G34

Datasheet Details

Part number 74HCT2G34
Manufacturer nexperia
File Size 220.55 KB
Description Dual buffer gate
Datasheet download datasheet 74HCT2G34 Datasheet
Additional preview pages of the 74HCT2G34 datasheet.

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Full PDF Text Transcription

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74HC2G34; 74HCT2G34 Dual buffer gate Rev. 2 — 3 February 2022 Product data sheet 1. General description The 74HC2G34; 74HCT2G34 is a dual buffer. Inputs include clamp diodes. This enables the use of current limiting resistors to interface inputs to voltages in excess of VCC. 2. Features and benefits • Wide supply voltage range from 2.0 V to 6.0 V • High noise immunity • CMOS low power dissipation • Balanced propagation delays • Unlimited input rise and fall times • Input levels: • For 74HC2G34: CMOS level • For 74HCT2G34: TTL level • Latch-up performance exceeds 100 mA per JESD 78 Class II Level B • Complies with JEDEC standards • JESD8C (2.7 V to 3.6 V) • JESD7A (2.0 V to 6.
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