Datasheet4U Logo Datasheet4U.com

74HCT367D - Hex buffer/line driver

This page provides the datasheet information for the 74HCT367D, a member of the 74HC367 Hex buffer/line driver family.

Datasheet Summary

Description

The 74HC367; 74HCT367 is a hex buffer/line driver with 3-state outputs controlled by the output enable inputs (nOE).

A HIGH on nOE causes the outputs to assume a high impedance OFF-state.

Inputs include clamp diodes.

Features

  • Wide supply voltage range from 2.0 V to 6.0 V.
  • CMOS low power dissipation.
  • High noise immunity.
  • Latch-up performance exceeds 100 mA per JESD 78 Class II Level B.
  • Complies with JEDEC standards:.
  • JESD8C (2.7 V to 3.6 V).
  • JESD7A (2.0 V to 6.0 V).
  • 3-state outputs.
  • Input levels:.
  • For 74HC367: CMOS level.
  • For 74HCT367: TTL level.
  • ESD protection:.
  • HBM JESD22-A114F exceeds 2000 V.

📥 Download Datasheet

Datasheet preview – 74HCT367D

Datasheet Details

Part number 74HCT367D
Manufacturer nexperia
File Size 238.01 KB
Description Hex buffer/line driver
Datasheet download datasheet 74HCT367D Datasheet
Additional preview pages of the 74HCT367D datasheet.

📁 Similar Datasheet

  • 74HCT367 - Hex buffer/line driver (Philips)
  • 74HCT367 - Three-State Non-Inverting and Inverting (Texas Instruments)
  • 74HCT365 - Hex buffer/line driver (Philips)
  • 74HCT366 - Hex buffer/line driver (Philips)
  • 74HCT368 - Hex buffer/line driver (Philips)
  • 74HCT368 - Three-State Non-Inverting and Inverting (Texas Instruments)
  • 74HCT30 - 8-Input NAND Gate (Texas Instruments)
  • 74HCT30 - 8-Input NAND Gate (NXP)
  • 74HCT30-Q100 - 8-input NAND gate (NXP)
  • 74HCT32 - Quad 2-Input OR Gate (ON Semiconductor)
Other Datasheets by nexperia

Full PDF Text Transcription

Click to expand full text
74HC367; 74HCT367 Hex buffer/line driver; 3-state Rev. 4 — 24 February 2021 Product data sheet 1. General description The 74HC367; 74HCT367 is a hex buffer/line driver with 3-state outputs controlled by the output enable inputs (nOE). A HIGH on nOE causes the outputs to assume a high impedance OFF-state. Inputs include clamp diodes. It enables the use of current limiting resistors to interface inputs to voltages in excess of VCC. 2. Features and benefits • Wide supply voltage range from 2.0 V to 6.0 V • CMOS low power dissipation • High noise immunity • Latch-up performance exceeds 100 mA per JESD 78 Class II Level B • Complies with JEDEC standards: • JESD8C (2.7 V to 3.6 V) • JESD7A (2.0 V to 6.
Published: |