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74HCT3G07DP - Triple buffer

This page provides the datasheet information for the 74HCT3G07DP, a member of the 74HC3G07 Triple buffer family.

Datasheet Summary

Description

The 74HC3G07; 74HCT3G07 is a triple buffer with open-drain outputs.

Inputs include clamp diodes.

This enables the use of current limiting resistors to interface inputs to voltages in excess of VCC.

Features

  • Wide supply voltage range from 2.0 V to 6.0 V.
  • Input levels:.
  • For 74HC3G07: CMOS level.
  • For 74HCT3G07: TTL level.
  • CMOS low power dissipation.
  • High noise immunity.
  • Latch-up performance exceeds 100 mA per JESD 78 Class II Level B.
  • Complies with JEDEC standards.
  • JESD8C (2.7 V to 3.6 V).
  • JESD7A (2.0 V to 6.0 V).
  • ESD protection:.
  • HBM: ANSI/ESDA/JEDEC JS-001 class 2 exceeds 2000 V.
  • CDM.

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Datasheet preview – 74HCT3G07DP

Datasheet Details

Part number 74HCT3G07DP
Manufacturer nexperia
File Size 221.67 KB
Description Triple buffer
Datasheet download datasheet 74HCT3G07DP Datasheet
Additional preview pages of the 74HCT3G07DP datasheet.

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74HC3G07; 74HCT3G07 Triple buffer with open-drain outputs Rev. 6 — 13 December 2023 Product data sheet 1. General description The 74HC3G07; 74HCT3G07 is a triple buffer with open-drain outputs. Inputs include clamp diodes. This enables the use of current limiting resistors to interface inputs to voltages in excess of VCC. 2. Features and benefits • Wide supply voltage range from 2.0 V to 6.0 V • Input levels: • For 74HC3G07: CMOS level • For 74HCT3G07: TTL level • CMOS low power dissipation • High noise immunity • Latch-up performance exceeds 100 mA per JESD 78 Class II Level B • Complies with JEDEC standards • JESD8C (2.7 V to 3.6 V) • JESD7A (2.0 V to 6.
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