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74LV03D Datasheet PDF

Nexperia 74LV03D

The 74LV03 is a low-voltage Si-gate CMOS device and is pin and function compatible with 74HC/HCT03. The 74LV03 provides the 2-input NAND function. The 74LV03 has open-drain N-transistor outputs, which are not clamped by a diode connected to VCC.
Part No. 74LV03D
Datasheet 74LV03D Download
Manufacturer
Nexperia
Description Quad 2-input NAND gate
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74LV03D datasheet page 1 preview

FEATURES AND BENEFITS

● Wide operating voltage: 1.0 V to 5.5 V
● Optimized for low voltage applications: 1.0 V to 3.6 V
● Accepts TTL input levels between VCC = 2.7 V and VCC = 3.6 V
● Typical VOLP (output ground bounce) < 0.8 V @ VCC = 3.3 V, Tamb = 25 °C
● Typical VOHV (output VOH undershoot) > 2 V @ VCC = 3.3 V, Tamb = 25 °C
● Level shifter capability
● ESD protection: – HBM JESD22-A114F exceeds 2000 V – MM JESD22-A115-A exceeds 200 V
● Specified from -40 °C to +85 °C and from -40 °C to +125 °C 3 Ordering information Table 1. Ordering information Type number Package Temperature range 74LV03D -40 °C to + 125 °C Name SO14

DESCRIPTION

plastic small outline package; 14 leads; body width 3.9 mm Version SOT108-1 Nexperia 4 Functional diagram 1 1A 2 1B 4 2A 5 2B 9 3A 10 3B 12 4A 13 4B 1Y 3 2Y 6 3Y 8 4Y 11 mna212 Figure 1. Logic symbol 1 2 & 3 4 5 & 6 9 10 & 8 12 13 & 11 aaa-008083 Figure 2. IEC logic symbol 5 Pinning information 74LV03 Quad 2-input NAND gate Y A B GND 001aab715 Figure 3. Logic diagram (one gate) 5.1 Pinning Figure 4.
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