74LV86DB Datasheet | Nexperia

74LV86 Quad 2-input exclusive-OR gate Rev. 03 - 27 November 2007 Product data sheet 1. General description The 74LV86 is a low-voltage Si-gate CMOS device that is pin and function patible with 74HC86 and 74HCT86. The 74LV86 provides a quad 2-input exclusive-OR function. 2. Features s Wide operating voltage: 1.0 V to 5.5 V s Optimized for low voltage applications: 1.0 V to 3.6 V s Accepts TTL input levels between VCC = 2.7 V and VCC = 3.6 V s Typical output ground bounce < 0.8 V at VCC = 3.3 V and Tamb = 25 °C s Typical HIGH-level output voltage (VOH) undershoot: > 2 V at VCC = 3.3 V and Tamb = 25 °C s ESD protection: x HBM JESD22-A114E exceeds 2000 V x MM JESD22-A115-A exceeds 200 V s Multiple package options s Specified from - 40 °C to +85 °C and from - 40 °C to +125 °C 3. Ordering information Table 1. Ordering information Type number Package Temperature range Name Description 74LV86N - 40 °C to +125 °C DIP14 plastic dual in-line package; 14 leads (300 mil) 74LV86D - 40 °C to +125 °C SO14 plastic small outline package; 14 leads; body width 3.9 mm - 40 °C to +125 °C SSOP14 plastic shrink small outline package; 14 leads; body width 5.3 mm 74LV86PW - 40 °C to +125 °C TSSOP14 plastic thin shrink small outline package; 14 leads; body width 4.4 mm 74LV86BQ - 40 °C to +125 °C DHVQFN14 plastic dual in-line patible thermal enhanced very thin quad flat package; no leads; 14 terminals; body 2.5 × 3 × 0.85 mm Version SOT27-1 SOT108-1 SOT337-1 SOT402-1 SOT762-1...