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74LVC07ABQ - Hex buffer

Download the 74LVC07ABQ datasheet PDF. This datasheet also covers the 74LVC07A variant, as both devices belong to the same hex buffer family and are provided as variant models within a single manufacturer datasheet.

General Description

The 74LVC07A is a hex buffer with open-drain outputs.

Inputs can be driven from either 3.3 V or 5 V devices.

This feature allows the use of these devices as translators in mixed 3.3 V and 5 V environments.

Key Features

  • 5 V tolerant inputs and outputs (open-drain) for interfacing with 5 V logic.
  • Wide supply voltage range from 1.2 V to 5.5 V.
  • CMOS low power consumption.
  • Direct interface with TTL levels.
  • Overvoltage tolerant inputs to 5.5 V.
  • Complies with JEDEC standard:.
  • JESD8-7A (1.65 V to 1.95 V).
  • JESD8-5A (2.3 V to 2.7 V).
  • JESD8-C/JESD36 (2.7 V to 3.6 V).
  • ESD protection:.
  • HBM: ANSI/ESDA/JEDEC JS-001 class 2 exc.

📥 Download Datasheet

Note: The manufacturer provides a single datasheet file (74LVC07A-nexperia.pdf) that lists specifications for multiple related part numbers.

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Other Datasheets by Nexperia

Part Number Description
74LVC07ABZ Hex buffer
74LVC07A Hex buffer
74LVC07A-Q100 Hex buffer
74LVC07AD Hex buffer
74LVC07APW Hex buffer

Full PDF Text Transcription (Reference)

The following content is an automatically extracted verbatim text from the original manufacturer datasheet and is provided for reference purposes only.

View original datasheet text
74LVC07A Hex buffer with open-drain outputs Rev. 10 — 2 May 2025 Product data sheet 1. General description The 74LVC07A is a hex buffer with open-drain outputs. Inputs can be driven from either 3.3 V or 5 V devices. This feature allows the use of these devices as translators in mixed 3.3 V and 5 V environments. Schmitt-trigger action at all inputs makes the circuit tolerant of slower input rise and fall times. 2. Features and benefits • 5 V tolerant inputs and outputs (open-drain) for interfacing with 5 V logic • Wide supply voltage range from 1.2 V to 5.5 V • CMOS low power consumption • Direct interface with TTL levels • Overvoltage tolerant inputs to 5.5 V • Complies with JEDEC standard: • JESD8-7A (1.65 V to 1.95 V) • JESD8-5A (2.3 V to 2.7 V) • JESD8-C/JESD36 (2.7 V to 3.