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74LVC157A-Q100 - Quad 2-input multiplexer

General Description

The 74LVC157A-Q100 is a quad 2-input multiplexer which select four bits of data from two sources under the control of a common select input (S).

The four outputs present the selected data in the true (non-inverted) form.

The enable input (E) is active LOW.

Key Features

  • Automotive product qualification in accordance with AEC-Q100 (Grade 1).
  • Specified from -40 °C to +85 °C and -40 °C to +125 °C.
  • 5 V tolerant inputs for interfacing with 5 V logic.
  • Wide supply voltage range from 1.2 V to 3.6 V.
  • CMOS low power consumption.
  • Direct interface with TTL levels.
  • Complies with JEDEC standard:.
  • JESD8-7A (1.65 V to 1.95 V).
  • JESD8-5A (2.3 V to 2.7 V).
  • JESD8-C/JESD36 (2.7 V to.

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Full PDF Text Transcription (Reference)

The following content is an automatically extracted verbatim text from the original manufacturer datasheet and is provided for reference purposes only.

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74LVC157A-Q100 Quad 2-input multiplexer Rev. 3 — 19 March 2020 Product data sheet 1. General description The 74LVC157A-Q100 is a quad 2-input multiplexer which select four bits of data from two sources under the control of a common select input (S). The four outputs present the selected data in the true (non-inverted) form. The enable input (E) is active LOW. When pin E is HIGH, all of the outputs (1Y to 4Y) are forced LOW regardless of all the other input conditions. Moving the data from two groups of registers to four common output buses is a common use of the 74LVC157A-Q100. The state of the common data select input (S) determines the particular register from which the data comes. It can also be used as function generator.