Nexperia 74LVC1G386
The 74LVC1G386 is a single 3-input EXCLUSIVE-OR gate. This feature allows the use of these devices as translators in mixed 3.3 V and 5 V environments. This device is fully specified for partial power down applications using IOFF.FEATURES AND BENEFITS
● Wide supply voltage range from 1.65 V to 5.5 V● Overvoltage tolerant inputs to 5.5 V
● High noise immunity
● CMOS low power dissipation
● Direct interface with TTL levels
● ±24 mA output drive (VCC = 3.0 V)
● IOFF circuitry provides partial Power-down mode operation
● Latch-up performance exceeds 250 mA
● Complies with JEDEC standard:
● JESD8-7 (1.65 V to 1.95 V)
● JESD8-5 (2.3 V to 2.7 V)
● JESD8C (2.7 V to 3.6 V)
● JESD36 (4.5 V to 5.5 V)
● ESD protection:
● HBM EIA/JESD22-A114E exceeds 2000 V
● MM EIA/JESD22-A115-A exceeds 200 V.
● Specified from -40 to +85 °C and -40 to +125 °C. 3. Ordering information Table 1. Ordering information Type number Package Temperature range 74LVC1G386GW -40 °C to +125 °C Name TSSOP6 74LVC1G386GV -40 °C to +125 °C SC-74; TSOP6
DESCRIPTION
plastic thin shrink small outline package; 6 leads; body width 1.25 mm plastic surface-mounted package; 6 leads Version SOT363-2 SOT457 Nexperia 74LVC1G386 3-input EXCLUSIVE-OR gate 4. Marking Table 2.