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74LVC1G57 - Low-power configurable multiple function gate

Description

The 74LVC1G57 is a configurable multiple function gate with Schmitt-trigger inputs.

The device can be configured as any of the following logic functions AND, OR, NAND, NOR, XNOR, inverter and buffer; using the 3-bit input.

All inputs can be connected directly to VCC or GND.

Features

  • Wide supply voltage range from 1.65 V to 5.5 V.
  • Overvoltage tolerant inputs to 5.5 V.
  • High noise immunity.
  • ±24 mA output drive (VCC = 3.0 V).
  • CMOS low power dissipation.
  • Latch-up performance exceeds 250 mA.
  • Direct interface with TTL levels.
  • IOFF circuitry provides partial Power-down mode operation.
  • Complies with JEDEC standard:.
  • JESD8-7 (1.65 V to 1.95 V).
  • JESD8-5 (2.3 V to 2.7 V).
  • JESD8B.

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Datasheet preview – 74LVC1G57

Datasheet Details

Part number 74LVC1G57
Manufacturer nexperia
File Size 264.46 KB
Description Low-power configurable multiple function gate
Datasheet download datasheet 74LVC1G57 Datasheet
Additional preview pages of the 74LVC1G57 datasheet.

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Full PDF Text Transcription

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74LVC1G57 Low-power configurable multiple function gate Rev. 10 — 1 February 2022 Product data sheet 1. General description The 74LVC1G57 is a configurable multiple function gate with Schmitt-trigger inputs. The device can be configured as any of the following logic functions AND, OR, NAND, NOR, XNOR, inverter and buffer; using the 3-bit input. All inputs can be connected directly to VCC or GND. Inputs can be driven from either 3.3 V or 5 V devices. This feature allows the use of these devices as translators in mixed 3.3 V and 5 V environments. This device is fully specified for partial power down applications using IOFF. The IOFF circuitry disables the output, preventing the potentially damaging backflow current through the device when it is powered down. 2.
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