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74LVC2G240-Q100 - Dual inverting buffer/line driver

Datasheet Summary

Description

The 74LVC2G240-Q100 is a dual inverting buffer/line driver with 3-state outputs.

The output enable inputs 1OE and 2OE, control the 3-state outputs.

A HIGH level at pins nOE causes the outputs to assume a high-impedance OFF-state.

Features

  • Automotive product qualification in accordance with AEC-Q100 (Grade 1).
  • Specified from -40 °C to +85 °C and from -40 °C to +125 °C.
  • Wide supply voltage range from 1.65 V to 5.5 V.
  • 5 V tolerant input/output for interfacing with 5 V logic.
  • High noise immunity.
  • Complies with JEDEC standard:.
  • JESD8-7 (1.65 V to 1.95 V).
  • JESD8-5 (2.3 V to 2.7 V).
  • JESD8-B/JESD36 (2.7 V to 3.6 V).
  • ESD protection:.

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Datasheet Details

Part number 74LVC2G240-Q100
Manufacturer nexperia
File Size 223.79 KB
Description Dual inverting buffer/line driver
Datasheet download datasheet 74LVC2G240-Q100 Datasheet
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74LVC2G240-Q100 Dual inverting buffer/line driver; 3-state Rev. 4 — 1 June 2023 Product data sheet 1. General description The 74LVC2G240-Q100 is a dual inverting buffer/line driver with 3-state outputs. The output enable inputs 1OE and 2OE, control the 3-state outputs. A HIGH level at pins nOE causes the outputs to assume a high-impedance OFF-state. Schmitt trigger action at all inputs makes the circuit highly tolerant of slower input rise and fall times. Inputs can be driven from either 3.3 V or 5 V devices. This feature allows the use of the 74LVC2G240-Q100 as a translator in a mixed 3.3 V and 5 V environment. It is fully specified for partial power-down applications using IOFF.
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