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74VHC126-Q100 - Quad buffer/line driver

General Description

The 74VHC126-Q100; 74VHCT126-Q100 are high-speed Si-gate CMOS devices and are pin compatible with Low-power Schottky TTL (LSTTL).

They are specified in compliance with JEDEC standard No.

7-A.

Key Features

  • Automotive product qualification in accordance with AEC-Q100 (Grade 1).
  • Specified from -40 °C to +85 °C and from -40 °C to +125 °C.
  • Balanced propagation delays.
  • All inputs have Schmitt-trigger action.
  • Inputs accept voltages higher than VCC.
  • Input levels:.
  • The 74VHC126-Q100 operates with CMOS input level.
  • The 74VHCT126-Q100 operates with TTL input level.
  • ESD protection:.
  • MIL-STD-883, method 3015 exceeds 200.

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Full PDF Text Transcription (Reference)

The following content is an automatically extracted verbatim text from the original manufacturer datasheet and is provided for reference purposes only.

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74VHC126-Q100; 74VHCT126-Q100 Quad buffer/line driver; 3-state Rev. 2 — 6 April 2020 Product data sheet 1. General description The 74VHC126-Q100; 74VHCT126-Q100 are high-speed Si-gate CMOS devices and are pin compatible with Low-power Schottky TTL (LSTTL). They are specified in compliance with JEDEC standard No. 7-A. The 74VHC126-Q100; 74VHCT126-Q100 provide four non-inverting buffer/line drivers with 3-state outputs. The output enable input (nOE) controls the 3-state outputs (nY). A LOW-level at pin nOE causes the outputs to assume a high-impedance OFF-state. This product has been qualified to the Automotive Electronics Council (AEC) standard Q100 (Grade 1) and is suitable for use in automotive applications. 2.