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74VHCT32 - Quad 2-input OR gate

This page provides the datasheet information for the 74VHCT32, a member of the 74VHC32 Quad 2-input OR gate family.

Datasheet Summary

Description

The 74VHC32; 74VHCT32 are high-speed Si-gate CMOS devices and are pin compatible with Low-power Schottky TTL (LSTTL).

They are specified in compliance with JEDEC standard No.

7-A.

Features

  • Balanced propagation delays.
  • All inputs have Schmitt-trigger actions.
  • Inputs accept voltages higher than VCC.
  • Input levels:.
  • The 74VHC32 operates with CMOS input level.
  • The 74VHCT32 operates with TTL input level.
  • ESD protection:.
  • HBM JESD22-A114E exceeds 2000 V.
  • MM JESD22-A115-A exceeds 200 V.
  • CDM JESD22-C101C exceeds 1000 V.
  • Multiple package options.
  • Specified from -40 °C to +85 °C and f.

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Datasheet preview – 74VHCT32

Datasheet Details

Part number 74VHCT32
Manufacturer nexperia
File Size 235.09 KB
Description Quad 2-input OR gate
Datasheet download datasheet 74VHCT32 Datasheet
Additional preview pages of the 74VHCT32 datasheet.

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Full PDF Text Transcription

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74VHC32; 74VHCT32 Quad 2-input OR gate Rev. 2 — 3 September 2020 Product data sheet 1. General description The 74VHC32; 74VHCT32 are high-speed Si-gate CMOS devices and are pin compatible with Low-power Schottky TTL (LSTTL). They are specified in compliance with JEDEC standard No. 7-A. The 74VHC32; 74VHCT32 provide the 2-input OR function. 2. Features and benefits • Balanced propagation delays • All inputs have Schmitt-trigger actions • Inputs accept voltages higher than VCC • Input levels: • The 74VHC32 operates with CMOS input level • The 74VHCT32 operates with TTL input level • ESD protection: • HBM JESD22-A114E exceeds 2000 V • MM JESD22-A115-A exceeds 200 V • CDM JESD22-C101C exceeds 1000 V • Multiple package options • Specified from -40 °C to +85 °C and from -40 °C to +125 °C 3.
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