BUK98180-100A Datasheet | Nexperia

description Logic level N-channel enhancement mode Field-Effect Transistor (FET) in a plastic package using Trench MOS technology. This product has been designed and qualified to the appropriate AEC standard for use in automotive critical applications. 2. Features and benefits - Low conduction losses due to low on-state resistance - Q101 pliant - Suitable for logic level gate drive sources 3. Applications - 12 V, 24 V and 42 V loads - Automotive and general purpose power switching - Motors, lamps and solenoids 4. Quick reference data Table 1. Quick reference data Symbol Parameter Conditions VDS drain-source voltage Tj ≥ 25 °C; Tj ≤ 150 °C ID drain current VGS = 5 V; Tsp = 25 °C; Fig. 2; Fig. 3 Ptot total power dissipation Tsp = 25 °C; Fig. 1 Static characteristics RDSon drain-source on-state resistance VGS = 10 V; ID = 5 A; Tj = 25 °C VGS = 4.5 V; ID = 5 A; Tj = 25 °C VGS = 5 V; ID = 5 A; Tj = 25 °C; Fig. 12; Fig. 13 Avalanche ruggedness EDS(AL)S non-repetitive drainsource avalanche energy ID = 4 A; Vsup ≤ 100 V; RGS = 50 Ω; VGS = 5 V; Tj(init) = 25 °C; unclamped Min Typ Max Unit - - 100 V - - 4.6 A - - 8W - 147 173 mΩ - - 201 mΩ - 153 180 mΩ - - 16 m J Nexperia N-channel Trench MOS logic level FET 5. Pinning information Table 2. Pinning information Pin Symbol Description 1 G gate 2 D drain 3 S source 4 D drain Simplified...