HEF4015B - Dual 4-bit static shift register

Product Overview

nexperia

Datasheet Details

Part number	HEF4015B
Manufacturer	nexperia
File Size	208.73 KB
Description	Dual 4-bit static shift register
Datasheet	HEF4015B Datasheet
Additional preview pages of the HEF4015B datasheet.

Product details

Description

The HEF4015B is a dual edge-triggered 4-bit static shift register (serial-to-parallel converter).

Each shift register has a serial data input (nD), a clock input (nCP), four fully buffered parallel outputs (Q0 to Q3) and an overriding asynchronous master reset input (nMR).

Features

Wide supply voltage range from 3.0 V to 15.0 V.
CMOS low power dissipation.
High noise immunity.
Tolerant of slow clock rise and fall times.
Fully static operation.
5 V, 10 V, and 15 V parametric ratings.
Standardized symmetrical output characteristics.
Complies with JEDEC standard JESD 13-B.
ESD protection:.
HBM JESD22-A114F exceeds 2000 V.
MM JESD22-A115-B exceeds 200 V.
Specified from.

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Published: Jul 24, 2019 |