HEF4027B-Q100 Overview
The HEF4027B-Q100 is a dual positive-edge triggered JK flip-flop featuring independent set direct (nSD), clear direct (nCD), clock inputs (nCP) and plementary outputs (nQ and nQ). Data is accepted when nCP is LOW, and transferred to the output on the positive-going edge of the clock. The asynchronous clear-direct (nCD) and set-direct (nSD) are independent and override the nJ, nK, and nCP inputs.
HEF4027B-Q100 Key Features
- Automotive product qualification in accordance with AEC-Q100 (Grade 3)
- Specified from -40 °C to +85 °C
- Wide supply voltage range from 3.0 V to 15.0 V
- CMOS low power dissipation
- High noise immunity
- Fully static operation
- 5 V, 10 V, and 15 V parametric ratings
- Standardized symmetrical output characteristics
- plies with JEDEC standard JESD 13-B
- ESD protection
HEF4027B-Q100 Applications
- Automotive product qualification in accordance with AEC-Q100 (Grade 3)
- Specified from -40 °C to +85 °C
- Wide supply voltage range from 3.0 V to 15.0 V
