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NPIC6C596-Q100 Datasheet PDF

Nexperia NPIC6C596-Q100

The NPIC6C596-Q100 is an 8-bit serial-in/serial or parallel-out shift register with a storage register and open-drain outputs. Both the shift and storage register have separate clocks. The device features a serial input (DS) and a serial output (Q7S) to enable cascading and an asynchronous reset MR input.
Part No. NPIC6C596-Q100
Datasheet NPIC6C596-Q100 Download
Manufacturer
Nexperia
Description Power logic 8-bit shift register
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NPIC6C596-Q100 datasheet page 1 preview

FEATURES AND BENEFITS

● Automotive product qualification in accordance with AEC-Q100 (Grade 1)
● Specified from -40 °C to +125 °C
● Low RDSon
● Eight Power EDNMOS transistor outputs of 100 mA continuous current
● 250 mA current limit capability
● Output clamping voltage 33 V
● 30 mJ avalanche energy capability
● Enhanced cascading for multiple stages
● All registers cleared with single input
● Low power consumption
● ESD protection:
● HBM AEC-Q100-002 revision D exceeds 2500 V
● CDM AEC-Q100-011 revision B exceeds 1000 V
● DHVQFN package with Side-Wettable Flanks enabling Automatic Optical Inspection (AOI) of solder joints 3.

APPLICATIONS

● LED sign
● Graphic status panel
● Fault status indicator Nexperia NPIC6C596-Q100 Power logic 8-bit shift register; open-drain outputs 4. Ordering information Table 1. Ordering information Type number Package Temperature range Name

DESCRIPTION

Version NPIC6C596D-Q100 -40 °C to +125 °C SO16 plastic small outline package; 16 leads; body width 3.9 mm SO...
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