PSMN015-100P Datasheet | Nexperia

description Silicon MAX standard level N-channel enhancement mode Field-Effect Transistor (FET) in a plastic package using Trench MOS technology. This product is designed and qualified for use in puting, munications, consumer and industrial applications only. 1.2 Features and benefits - Low conduction losses due to low on-state resistance - Rated for avalanche ruggedness 1.3 Applications - DC-to-DC convertors - Switched-mode power supplies 1.4 Quick reference data Table 1. Quick reference Symbol VDS ID Parameter drain-source voltage drain current Conditions Tj ≥ 25 °C; Tj ≤ 175 °C Tmb = 25 °C; VGS = 10 V; see Figure 1 and 3 Ptot total power dissipation Tmb = 25 °C; see Figure 2 Dynamic characteristics QGD gate-drain charge VGS = 10 V; ID = 75 A; VDS = 80 V; Tj = 25 °C; see Figure 11 Static characteristics RDSon drain-source VGS = 10 V; ID = 25 A; on-state resistance Tj = 25 °C; see Figure 9 and 10 Min Typ Max Unit - - 100 V - - 75 A - - 300 W - 35 - n C - 12 15 mΩ Nexperia 2. Pinning information Table 2. Pinning information Pin Symbol Description 1G gate 2D drain 3S source mb D mounting base; connected to drain N-channel Trench MOS Silicon MAX standard level FET Simplified outline mb Graphic...