DESCRIPTION
A precision temperature−compensated reference and comparator circuits monitor the 5 V, VCC input voltage status. During power−up or when the VCC power supply falls outside selectable tolerance limits, both RESET and RESET become active. When VCC rises above the threshold voltage, the reset signals remain active for an additional 250 ms minimum, allowing the power supply and system microprocessor to stabilize. The trip point tolerance signal, TOL, selects the trip level tolerance to be either 5% or 10%. Each device has both a push−pull, active HIGH reset output and an open drain active LOW reset output. A debounced manual reset input, PBRST, activates the reset outputs for a minimum period of 250 ms. There is a watchdog timer to stop and restart a microprocessor that is “hung−up”. The watchdog timeouts periods are selectable: 150 ms, 610 ms and 1200 ms. If the ST input is not strobed LOW before the time−out period expires, a reset is generated. Devices are available in 8−pin DIP, 16−pin SO and compact 8−pin MicroSO packages.
onsemi
