onsemi NB3V8312C
The NB3V8312C is a high performance, low skew L VCMOS fanout buffer which can distribute 12 ultra −low jitter clocks from an LVCMOS/LVTTL input up to 250 MHz. The 12 LVCMOS output pins drive 50 W series or parallel terminated transmission lines. The outputs can also be disabled to a high impedance (tri−stated) via the OE input, or enabled when High.| Part No. | NB3V8312C |
|---|---|
| Datasheet | NB3V8312C Download |
| Manufacturer |  onsemi |
| Description | Ultra-Low Jitter Low Skew 1:12 LVCMOS - LVTTL Fanout Buffer |
| Buy | Stock & Price |
FEATURES
1 LQFP−32 FA SUFFIX CASE 873A VDDO VDD GND RPU CLK_EN D Q 32 QFN32 MN SUFFIX CASE 488AM Q0 Q1 Q2 Q3 Q4 Q5 Q6 Q7 Q8 Q9 Q10 Q11 CLK RPD● Power Supply Modes:
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● VDD (Core) / VDDO (Outputs) 3.3 V / 3.3 V 3.3 V / 2.5 V 3.3 V / 1.8 V 2.5 V / 2.5 V 2.5 V / 1.8 V 1.8 V / 1.8 V 250 MHz Maximum Clock Frequency Accepts LVCMOS, LVTTL Clock Inputs LVCMOS Compatible Control Inputs 12 LVCMOS Clock Outputs Synchronous Clock Enable Output Enable to High Z State Control 150 ps Max. Skew Between Outputs Temp. Range −40°C to +85°C 32−pin LQFP and QFN Packages These are Pb−Free Devices OE RPU Figure 1. Simplified Logic Diagram ORDERING AND MARKING INFORMATION See detailed ordering and shipping information on page 9 of this data sheet.
APPLICATIONS
● Networking● Telecom
● Storage Area Network End Products
● Servers
● Routers
● Switches © Semiconductor Components Industries, LLC, 2013 August, 2013 − Rev. 0 1 Publication Order Number: NB3V8312C/D NB3V8312C VDDO VDDO GND Q0 GND Q1 Q...
