onsemi NB4N11S
The NB4N11S is a differential 1:2 Clock or Data Receiver and will accept AnyLevelTM input signals: LVPECL, CML, LVCMOS, LVTTL, or LVDS. These signals will be translated to LVDS and two identical copies of Clock or Data will be distributed, operating up to 2.0 GHz or 2.5 Gb/s, respectively. The NB4N11S has a wide input common mode range from GND + 50 mV to VCC − 50 mV.| Part No. | NB4N11S |
|---|---|
| Datasheet | NB4N11S Download |
| Manufacturer |  onsemi |
| Description | 3.3V 1:2 AnyLevel Input to LVDS Fanout Buffer /Translator |
| Buy | Stock & Price |
FEATURES
MARKING DIAGRAM* 16 1 1 QFN−16 MN SUFFIX CASE 485G NB4N 11S ALYW A L Y W = Assembly Location = Wafer Lot = Year = Work Week●
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● Maximum Input Clock Frequency > 2.0 GHz Maximum Input Data Rate > 2.5 Gb/s 1 ps Maximum of RMS Clock Jitter Typically 10 ps of Data Dependent Jitter 380 ps Typical Propagation Delay 120 ps Typical Rise and Fall Times Functionally Compatible with Existing 3.3 V LVEL, LVEP, EP, and SG Devices *For additional marking information, refer to Application Note AND8002/D. Q0 VTD D D Q0 VOLTAGE (130 mV/div) VTD Q1 Q1 Device DDJ = 10 ps Figure 1. Logic Diagram TIME (58 ps/div) Figure 2. Typical Output Waveform at 2.488 Gb/s with PRBS 223−1 (VINPP = 400 mV; Input Signal DDJ = 14 ps) ORDERING INFORMATION See detailed ordering and shipping information in the package dimensions section on page 9 of this data sheet. © Semiconductor Components Industries, LLC, 2005 1 December, 2005 − Rev. 0 Publication Order Number: NB4N11S/D NB4N11S Exposed Pad (EP) VCC VCC VCC VCC 16 Q0 Q0 Q1 Q1 1 2 NB4N11S 3 4 10 D 9 VTD 15 14 13 12 VTD 11 D 5 VCC 6 NC 7 VEE 8 VEE Figure 3.
