DESCRIPTION
The SN74LS259 has four modes of operation as shown in the mode selection table. In the addressable latch mode, data on the Data line (D) is written into the addressed latch.The addressed latch will follow the data input with all non-addressed latches remaining in their previous states. In the memory mode, all latches remain in their previous state and are unaffected by the Data or Address inputs. In the one-of-eight decoding or demultiplexing mode, the addressed output will follow the state of the D input with all 9 10 11 12 Q4 Q5 Q6 Q7 other inputs in the LOW state. In the clear mode all outputs are LOW and unaffected by the address and data inputs. When operating the SN74LS259 as an addressable latch, changing more then one bit of the address could impose a transient wrong address. Therefore, this should only be done while in the memory mode. The truth table below summarizes the operations. MODE SELECTION EC MODE LH HH LL HL Addressable Latch Memory Active HIGH Eight-Chan...
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