74LVC1G11 Datasheet and Specifications PDF

The 74LVC1G11 provides a single 3-input AND gate. The input can be driven from either 3.3 V or 5 V devices. This feature allows the use of this device in a mixed 3.3 V and 5 V environment. Schmitt-tri.

and benefits
* Wide supply voltage range from 1.65 V to 5.5 V
* 5 V tolerant inputs for interfacing with 5 V logic
* High noise immunity
* Complies with JEDEC standard:
* JESD8-7 (1.65 V to 1.95 V)
* JESD8-5 (2.3 V to 2.7 V)
* JESD8-B/JESD36 (2.7 V to 3.6 V)
* 24 mA output drive (VCC = 3.0 V)
* ESD.

The 74LVC1G11 is a single 3-input AND gate. Inputs can be driven from either 3.3 V or 5 V devices. This feature allows the use of these devices as translators in mixed 3.3 V and 5 V environments. Schm.

and benefits
* Wide supply voltage range from 1.65 V to 5.5 V
* Overvoltage tolerant inputs to 5.5 V
* High noise immunity
* ±24 mA output drive (VCC = 3.0 V)
* CMOS low power dissipation
* Direct interface with TTL levels
* IOFF circuitry provides partial Power-down mode operation
* Latch-up perfor.

Pin Assignments The 74LVC1G11 is a single 3-input positive AND gate with a standard push-pull output. The device is designed for operation with a power supply range of 1.65V to 5.5V. The inputs are .

* Wide Supply Voltage Range from 1.65V to 5.5V
* ± 24mA Output Drive at 3.3V
* CMOS Low Power Consumption
* IOFF Supports Partial-Power-Down Mode Operation
* Inputs Accept up to 5.5V
* ESD Protection Exceeds JESD 22:
* 200-V Machine Model (A115-A)
* 2000-V Human Body Model (A114-A)
* Latch-Up Exceed.