| Part Number | 9DB106 Datasheet |
|---|---|
| Manufacturer | Renesas |
| Overview | Features/Benefits The 9DB106 zero-delay buffer supports PCIe Gen1 and Gen2 clocking requirements. The 9DB106 is driven by a differential SRC output pair from an IDT CK410/CK505-compliant main clock . Benefits The 9DB106 zero-delay buffer supports PCIe Gen1 and Gen2 clocking requirements. The 9DB106 is driven by a differential SRC output pair from an IDT CK410/CK505-compliant main clock generator. It attenuates jitter on the input clock and has a selectable PLL bandwidth to maximize performance . |
9DB106 Datasheet and Specifications PDF
The 9DB106 is a Six Output Differential Buffer.
Key Specifications
| Package | TSSOP |
|---|---|
| Mount Type | Surface Mount |
| Pins | 28 |
| Operating Voltage | 3.3 V |
| Max Voltage (typical range) | 3.465 V |
| Min Voltage (typical range) | 3.135 V |
| Max Frequency | 105 MHz |
| Output Type (varies by manufacturer) | HCSL |
| Part Number | 9DB106 Datasheet |
|---|---|
| Description | Six Output Differential Buffer |
| Manufacturer | IDT |
| Overview | Features/Benefits The 9DB106 zero-delay buffer supports PCIe Gen1 and Gen2 clocking requirements. The 9DB106 is driven by a differential SRC output pair from an IDT CK410/CK505-compliant main clock . Benefits The 9DB106 zero-delay buffer supports PCIe Gen1 and Gen2 clocking requirements. The 9DB106 is driven by a differential SRC output pair from an IDT CK410/CK505-compliant main clock generator. It attenuates jitter on the input clock and has a selectable PLL bandwidth to maximize performance . |