9DBL0242 Datasheet and Specifications PDF

The 9DBL0242 is a 2-output 3.3V PCIe Zero-Delay Buffer.

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Part Number9DBL0242 Datasheet
ManufacturerIDT
Overview The 9DBL0242 / 9DBL0252 devices are 3.3V members of IDT's Full-Featured PCIe family. The devices support PCIe Gen1-4 Common Clocked (CC) and PCIe Gen2 Separate Reference Independent Spread (SRIS) syst.
* 2
* 1-200 MHz Low-Power (LP) HCSL DIF pairs
* 9DBL0242 default ZOUT = 100
* 9DBL0252 default ZOUT = 85
* 9DBL02P2 factory programmable defaults
* Easy AC-coupling to other logic families, see IDT application note AN-891 Key Specifications
* PCIe Gen1-2-3-4 CC compliant in ZDB mode
* PCIe Gen2 SR.
Part Number9DBL0242 Datasheet
DescriptionZero-Delay/Fanout Buffer
ManufacturerRenesas
Overview The 9DBL02x2/9DBL04x2/ 9DBL06x1/9DBL08x1 buffers are low-power, high-performance members of Renesas' full featured PCIe family. The buffers support PCIe Gen1 through Gen5. PCIe Clocking Architectures . ▪ 2 to 8 Low-Power HCSL (LP-HCSL) outputs eliminate 4 resistors per output pair ▪ 9DBLxx4x devices provide integrated 100Ω terminations ▪ 9DBLxx5x devices provide integrated 85Ω terminations ▪ See AN-891 for easy coupling to other logic families ▪ Spread-spectrum compatible ▪ Dedicated OE# pin for e.