The FDG6322C is a Dual N & P Channel Digital FET.
| Package | SC |
|---|---|
| Mount Type | Surface Mount |
| Pins | 6 |
| Height | 1.1 mm |
| Length | 2 mm |
| Width | 1.25 mm |
| Max Operating Temp | 150 °C |
| Min Operating Temp | -55 °C |
| Part Number | FDG6322C Datasheet |
|---|---|
| Manufacturer | onsemi |
| Overview | These dual N & P-Channel logic level enhancement mode field effect transistors are produced using ON Semiconductor's proprietary, high cell density, DMOS technology. This very high density process is . N-Ch 0.22 A, 25 V, RDS(ON) = 4.0 Ω @ VGS= 4.5 V, RDS(ON) = 5.0 Ω @ VGS= 2.7 V. P-Ch -0.41 A,-25V, RDS(ON) = 1.1 Ω @ VGS= -4.5V, RDS(ON) = 1.5 Ω @ VGS= -2.7V. Very small package outline SC70-6. Very low level gate drive requirements allowing direct operation in 3 V circuits (VGS(th) < 1.5 V). Gate-So. |
| Part Number | FDG6322C Datasheet |
|---|---|
| Description | Dual N & P Channel Digital FET |
| Manufacturer | Fairchild Semiconductor |
| Overview | These dual N & P-Channel logic level enhancement mode field effect transistors are produced using Fairchild's proprietary, high cell density, DMOS technology. This very high density process is especia. N-Ch 0.22 A, 25 V, RDS(ON) = 4.0 Ω @ VGS= 4.5 V, RDS(ON) = 5.0 Ω @ VGS= 2.7 V. P-Ch -0.41 A,-25V, RDS(ON) = 1.1 Ω @ VGS= -4.5V, RDS(ON) = 1.5 Ω @ VGS= -2.7V. Very small package outline SC70-6. Very low level gate drive requirements allowing direct operation in 3 V circuits (VGS(th) < 1.5 V). Gate-So. |
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