The HD74LS195A is a 4-bit Parallel-Access Shift Registers.
| Package | DIP |
|---|---|
| Operating Voltage | 5 V |
| Max Voltage (typical range) | 5.25 V |
| Min Voltage (typical range) | 4.75 V |
| Logic Function | Shift Register |
| Clock Edge Trigger | Positive Edge |
| Length | 19.2 mm |
| Width | 7.62 mm |
Hitachi Semiconductor
19.20 20.00 Max 16 9 7.40 Max 6.30 Unit: mm 1 1.3 1.11 Max 8 0.51 Min 2.54 Min 5.06 Max 7.62 2.54 ± 0.25 0.48 ± 0.10 0.25 – 0.05 0° – 15° Hitachi Code JEDEC EIAJ Weight (reference value) + 0.
s or any third party’s patent, copyright, trademark, or other intellectual property rights for information contained in this document. Hitachi bears no responsibility for problems that may arise with third party’s rights, including intellectual property rights, in connection with use of the informat.
Renesas
HD74LS195A 4-bit Parallel-Access Shift Register REJ03D0457–0300 Rev.3.00 Jul.15.2005 This 4-bit register features parallel inputs, parallel outputs, J-K serial inputs, shift / load control input, a.
parallel inputs, parallel outputs, J-K serial inputs, shift / load control input, and a direct overriding clear. All inputs are buffered to lower the input drive requirements. The registers have two modes of operation:
* Parallel (broadside) load
* Shift (in the direction QA toward QD)
Parallel load.
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