SN74LS374 Datasheet and Specifications PDF

SN74LS373, SN74LS374 Octal Transparent Latch with 3−State Outputs; Octal D−Type Flip−Flop with 3−State Output The SN74LS373 consists of eight latches with 3-state outputs for bus organized system app.

D-Type Inputs
* Buffered Positive Edge-Triggered Clock
* Hysteresis on Clock Input to Improve Noise Margin
* Input Clamp Diodes Limit High Speed Termination Effects GUARANTEED OPERATING RANGES Symbol Parameter Min Typ Max Unit VCC Supply Voltage TA Operating Ambient Temperature Range 4.75 .

OCTAL TRANSPARENT LATCH WITH 3-STATE OUTPUTS; OCTAL D-TYPE FLIP-FLOP WITH 3-STATE OUTPUT The SN54 / 74LS373 consists of eight latches with 3-state outputs for bus organized system applications. The f.

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These 8-bit registers feature 3-state outputs designed specifically for driving highly capacitive or relatively low-impedance loads. The high-impedance 3-state and increased high-logic-level drive pro.

3-state outputs designed specifically for driving highly capacitive or relatively low-impedance loads. The high-impedance 3-state and increased high-logic-level drive provide these registers with the capability of being connected directly to and driving the bus lines in a bus-organized system withou.