The SN74LS73A is a DUAL JK NEGATIVE EDGE-TRIGGERED FLIP-FLOP.
| Package | SOIC |
|---|---|
| Mount Type | Surface Mount |
| Pins | 14 |
| Operating Voltage | 5 V |
| Max Voltage (typical range) | 5.25 V |
| Min Voltage (typical range) | 4.75 V |
| Logic Function | Flip-Flop |
| Clock Edge Trigger | Negative Edge |
Motorola Semiconductor
DUAL JK NEGATIVE EDGE-TRIGGERED FLIP-FLOP The SN54LS / 74LS73A offers individual J, K, clear, and clock inputs. These dual flip-flops are designed so that when the clock goes HIGH, the inputs are enab.
.
Texas Instruments
SN5473, SN54LS73A, SN7473, SN74LS73A DUAL J-K FLIP-FLOPS WITH CLEAR SDLS118 – DECEMBER 1983 – REVISED MARCH 1988 PRODUCTION DATA information is current as of publication date. Products conform to spe.
DLS118
* DECEMBER 1983
* REVISED MARCH 1988
* POST OFFICE BOX 655303 DALLAS, TEXAS 75265
5
PACKAGE OPTION ADDENDUM
PACKAGING INFORMATION
Orderable Device 5962-9675101QCA
Status Package Type Package Pins Package Eco Plan
(1)
Drawing
Qty
(2)
ACTIVE
CDIP
J
14
1
Non-RoHS &
N.
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| DigiKey | 4653 | 1+ : 2.31 USD 10+ : 1.717 USD 25+ : 1.5668 USD 100+ : 1.4022 USD |
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