SP8400 Datasheet
SP8400 Datasheet (Zarlink Semiconductor)
Zarlink Semiconductor
synthesiser divider The divider is based on a divide by 8/9 modulus prescaler, and a 12 stage control counter. This gives minimum fractional – N division ratio of 64 (56 for general division), and a .
I Very low Phase Noise (Typically -156dBc/Hz at 1kHz offset) I Supply Voltage 5V M2 M1 M0 VCC +5V GND CLOCK INPUT CLOCK INPUT CLOCK INPUT CLOCK INPUT GND VCC +5V VCC +5V GND A0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 28 27 26 25 24 23 22 21 20 19 18 17 16 15 M3 M4 M5 M6 M7 M8 N/C OUTPUT OUTPUT N/C VCC .
SP8400 Datasheet (Mitel Networks)
Mitel Networks
synthesiser divider The divider is based on a divide by 8/9 modulus prescaler, and a 12 stage control counter. This gives minimum fractional – N division ratio of 64 (56 for general division), and a .
s Very low Phase Noise (Typically -156dBc/Hz at 1kHz offset) s Supply Voltage 5V ABSOLUTE MAXIMUM RATINGS Supply Voltage Output Current Storage Temperature Range Maximum Clock Input Voltage 6.5V 20mA -55°C to +125°C 2.5V p-p MP28 Fig.1 Pin connections - top view ORDERING INFORMATION SP8400 KG MP.