SI53326 Datasheet and Specifications PDF

The SI53326 is a Low-Jitter LVPECL Fanout Clock Buffers.

SI53326 Datasheet

SI53326 Datasheet (Silicon Labs)

Silicon Labs

SI53326 Datasheet Preview

2. Functional Description The Si53320-28 are a family of low-jitter, low-skew, fixed-format (LVPECL) buffers. All devices except the Si53326 and Si53328 have a universal input that accepts most common.

include independent output enable and built-in format translation. These buffers can be paired with the Si534x clocks and Si5xx oscillators to deliver end-to-end clock tree performance. KEY FEATURES
* Ultra-low additive jitter: 50 fs rms
* Built-in LDOs for high PSRR performance
* Up to 10 LVPECL O.

SI53326 Datasheet (Skyworks Solutions)

Skyworks Solutions

SI53326 Datasheet Preview

2. Functional Description The Si53320-28 are a family of low-jitter, low-skew, fixed-format (LVPECL) buffers. All devices except the Si53326 and Si53328 have a universal input that accepts most common.

include independent output enable and built-in format translation. These buffers can be paired with the Si534x clocks and Si5xx oscillators to deliver end-to-end clock tree performance. KEY FEATURES
* Ultra-low additive jitter: 50 fs rms
* Built-in LDOs for high PSRR performance
* Up to 10 LVPECL O.

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