SI5347 Datasheet and Specifications PDF

The Si5347 is a high performance jitter attenuating clock multiplier which integrates four any-frequency DSPLLs for applications that require maximum integration and independent timing paths. The Si5.

* Four or two independent DSPLLs in a
* Automatic free-run and holdover modes single monolithic IC
* Fastlock feature for low nominal
* Each DSPLL generates any output bandwidths frequency from any input frequency
* Input frequency range:
* Glitchless on-the-fly DSPLL frequency changes
*Dif.

. . . . . . . . . . . . . . . . . . . . . . . . . . . 6 3.1 Frequency Configuration . . . . . . . . . . . . . . . . . . . . . . . . . . 6 3.2 DSPLL Loop Bandwidth . . . . . . . . . . . . . . . . . . .

* Four or two independent DSPLLs, any output frequency from any input frequency
* Ultra-low jitter of 95 fs rms
* Input frequency range:
* External Crystal: 25
*54 MHz
* Differential: 8 kHz to 750 MHz
* LVCMOS: 8 kHz to 250 MHz
* Output frequency range:
* Differential: 100 Hz to 720 MHz
* LVCMOS: 100.